                                 Frequency counter-0.2

                          Copyright Jan Panteltje 21 century.

This is the Verilog source for a simple frequency counter for the Digilab D2 with Spartan 2-200.
It uses a 2 line LCD, docs for the LCD are included.
It also sends the display to the serial port at 19200 Bd, 8 bits, 1 stop bit, no parity.
See the UCF file for how the LCD is connected, use 1 kOhm resistors
in the LCD data lines, and a pot between + 5V and ground for the LCD contrast.
The pin marked 'ethernet' is the input.
Tested to 200 MHz on internal signal, may go higher.
Remembers last frequency probe touched.
I use a transistor diff amp as input (also to protect the FPGA).

The mmake2 script is tested on Xilinx webpack-8.1.i
You may need the p3j parallel cable 3 program to replace Impact in Linux from
http://panteltje.com/panteltje/fpga/
Code was written and tested in Linux.
This software works in Linux with the Linux version of Xilinx Webpack-8.1.i.


No LCD?
If you do not want to use the LCD, it should be possible to comment out 'define USE_LCD' in top.v.
In such a case you must assign 1'b0 to the wire 'lcd_busy.'
The output will still go to the serial port, but this needs some more work, you can read the
frequency though.


The binary to bcd source is from www.opencores.org.
The rest is from me.
Released under LGPL.

