Subject: Re: History of Digital Microprocessors

From: [email-masked] (Terry Kennedy, Operations Mgr.)
Date: Thu, 25 Nov 1993 14:51:50 GMT

In article <[email-masked]>, [email-masked] (Strong datatypes for weak minds.) writes:
>       The LSI-11 was Digital's entry into the microprocessor market.  It was
>       developed in 1974 and was the first PDP-11 chip set.  There were three
>       types of chips that together emulated PDP-11 architecture.

  This was built outside of Digital (By Western Digital Corp, who also did the
fab work for Digital's first UART). Western Digital sold various versions of
the chipset to others, often called the WD-16, where they showed up in things
like the "Alpha Micro" system, which used an operating system called AMOS, 
which looked sort of like RSTS/E. A version of the chipset that executed UCSD
P-code was marketed as the "Pascal Microengine", and another variant was found
in AT&T's first microprocessor-controlled 9600 baud leased line modem.

  Like many of the early processor efforts, this chipset needed a number of
voltages and overlapping clock phases. The chipset is easily detected by the
Western Digital logo on the chip, and in the non-DEC versions, by WD's unique
plastic packaging which uses a plastic instead of ceramic, but with ceramic
style production (a cover glued over the die, instead of the usual injection
molding of the part).

  DEC offered various instruction set extensions which came in additional
"microms". A fully loaded WD-16 contained 6 40-pin parts.

>       The DCF11 brought a higher level of integration to the PDP-11.  Taking
>       advantage of advanced design in PLA decoding, it permitted the
>       microcode to be on the same chip as the control circuitry.

  The F11 was a DEC designed-and-built chip and brought a great number of new
features to the LSI product space. DEC offered floating point (which required
the MMU as some of the registers were in the MMU hybrid) and the Commercial
Instruction Set (CIS). DEC also offered "hot" floating point in the FPF11,
which brought the F11's floating point speed up to that of an 11/44 (it was
the same basic FPA design). The FPF11 is also unique in that the same module
works in both Unibus and Q-bus systems (it only draws power and has jumpers
for which pins to use for power and to pass bus grant with).

>       To get the PDP-11 architecture on a single chip in a 40 pin package the
>       design team had to do a lot of "hand crafting".  The result is the
>       DCT11.  The "T-11" is able to program its operation so that it may be
>       used in 8 bit systems.  The T11 RAS/CAS signals interface directly to
>       dynamic RAMs and it had a 7.5 MHz input clock.  A 10 MHz version may
>       have been produced.

  The T11 came out at a time where it looked possible to get the whole CPU on
a chip, if some performance tradeoffs were taken. Since the target market for
this chip was the OEM microcontroller business, the goal was to leverage the
existing PDP-11 development tools. The chip has enough differences from the
PDP-11 spec that some code needed to be modified to run on the chip (RT-11,
for example).

  DEC used the part in such boards as the DEUNA Unibus Ethernet controller,
the RQDX1/2/3 controllers, etc. and was the main consumer of the parts. Later
DEC controllers used either the 80186/8 (like the TQK50) or the 68000 (like
the DELQA and DELUA) for improved performance. Also, commercial in-circuit
emulators for those parts were available for less than DEC could produce T11
emulators in-house. DEC also offered the card as a Q-bus processor, the Falcon
(SBC11/21).

>       The "flag ship" of PDP-11 16 bit processors is the DCJ11.  There are
>       two chip types.  A data chip with a 32 bit internal data path and the
>       registers for memory management.  In addition there are registers to
>       assist floating point microcode.  The control chip has the microcode
>       for the entire PDP-11 instruction set including floating point.  (The
>       Commercial Instruction Set, CIS, is not included.)

  The J11 is built by Harris Semiconductor. The J11 has many features which
were never completed or released. Some of them include faster operation (the
original fast and slow speeds were to be 24 and 20 Mhz, not the current 18 and
15), writable control store, and CIS. If you look on the bottom of the DCJ11,
you will see the pads and traces for the additional hybrids for those func-
tions. Unfortunately, the DCJ11 was late and slow and suffered from a large
number of microcode bugs. There is still a huge stock of older-rev DCJ11s at
Digital that couldn't handle the FPA or work at high speeds. Since the gate
arrays on the 11/83 CPU module won't reliably run faster than 18Mhz, the top
speed was reduced to 18Mhz. The 11/93 module doesn't have any such limits, and
I have sped up 11/93's to speeds up to 26Mhz.

  The DCJ11 is used in the DECserver 5x0 family, the older HSC's, and in the
PDP-11/53/73/83/84/93/94 and various 3rd-party boards from vendors such as
Mentec and Nissho.

>       The FPJ11 floating point option is available to improve performance for
>       arithmetic operations.

  The FPJ11 design was "recycled" as the basis for the MicroVAX II's floating
point unit.

	Terry Kennedy		Operations Manager, Academic Computing
	[email-masked]	St. Peter's College, Jersey City, NJ USA
	[email-masked]	+1 201 915 9381