.title floating point initialisation .ident /840816/ .mcall .sfpa,.print,.gval .globl v.area ;+ ; This code initialises the fp11, if available, to suit NBS and informs ; the monitor to pass all exceptions here. ;- ;+ ; Status Error Bits ;- fer = 100000 ;floating error fie = 40000 ;interrupt enable fiuv = 4000 ;interrupt on undefined variable fiu = 2000 ;interrupt on underflow fiv = 1000 ;interrupt on overflow fic = 400 ;interrupt on integer conversion error fd = 200 ;floating double precision mode fl = 100 ;floating long integer mode ft = 40 ;floating truncate mode fmm = 20 ;floating maintenance mode fn = 10 ;floating negative fz = 4 ;floating zero fv = 2 ;floating overflow fc = 1 ;floating carry ;+ ; Error Codes ;- foce = 2 ;floating opcode error fdze = 4 ;floating divide by zero fice = 6 ;floating integer conversion error fve = 10 ;floating overflow fue = 12 ;floating underflow fuve = 14 ;floating undefined variable fmt = 16 ;floating maintenance trap ;+ ; Initialise system. ;- config = 300 ;configuration offset hwfpu = 100 ;fp11 hardware ; p.fpin:: .sfpa #v.area,#fperr ;exceptions to be caught here .gval #v.area,#config bit #hwfpu,r0 beq 10$ ;no fp11 at all movb #1,fp11 ;flag fp11 availability ldfps # ;set up fp11 10$: return ;+ ; Error message routines. ;- fperr: tstb fp11 beq fiserr ;must be a fis exception inform <> ;message prefix .print #msgpre mov (sp)+,r0 ;fp11 floating exception register mov (r0),r0 .print fiserr: fatal ; .psect $varbl fperrm: .word msg2,msg4,msg6,msg8,msg10,msg12,msg14 ; .psect $msg,d fp11: .byte 0 ;assume fis hardware msgpre: .ascii /Floating /<200> msg2: .asciz /opcode error/ msg4: .asciz /divide by zero/ msg6: .asciz /integer conversion error/ msg8: .asciz /overflow/ msg10: .asciz /underflow/ msg12: .asciz /undefined variable/ msg14: .asciz /maintenance trap/ ; .end