From SMACKINLA@cc.curtin.edu.au  Ukn Jul  3 09:26:13 1993
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Date: 03 Jul 1993 21:24:47 +0800
From: Pat Mackinlay <SMACKINLA@cc.curtin.edu.au>
Subject: Re: SCSI chips, specifically NCR53c{,f}9x family
To: drew@nagina.cs.Colorado.EDU
Cc: riscy@pyramid.com
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>Ok, I called NCR's SCSI division, got some literature on the 53c90 
>series, saw that the 53c90 looks like what we wanted, and talked to
>the local NCR distributor, Electrodyne (303)-695-903 for pricing
>information.

Good one. I believe that the 53c94 may actually be a slightly improved 
version of the '90, with some relaxed timing requirements and miscellaneous 
bug fixes. Do you have any info on the '94?

>The host/DMA interface is 8 bits wide, so it's best on an 
>8 bit bus of the 3730.

Some friends of mine were did an ARM-based machine similar to what we're 
aiming at here, and they used some variant of this NCR chip. A neat trick 
they were able to use was to attach the DREQ/DACK signals to the regular 
bus I/O signals, and use the LDM/STM (load/store multiple registers) 
instructions to do "fake" DMA. The ARM only has 16 registers, so they could 
do a maximum of 32 (16 x 2) bytes at once, but it was still significantly 
faster than doing it across the regular 8 bit bus.

Sorry I can't tell you about the 3730's DMA interface. Seeing as the TLB is 
on the CPU, it probably doesn't support any kind of scatter-gather. I know 
DEC used the 53cf94 in some of their MIPS-based machines - anyone know how 
they dealt with the problem there? Personally, I don't think it's such a 
problem. I had first hand experience of the Seagate scatter-gather 
performance improvement (thanks Drew <grin>), but suspect that it wouldn't 
be so drastic with this chip (much more intelligent/faster setup phases).

So, I think the question now is: do we try and attach it to a DMA channel, 
or do we just make it a PIO device? If we have a dedicated I/O controller 
(3041), there's no real choice to be made. If we use a 3730, however, I 
think it's an important point to consider.

Pat -- "There's only one thing left to do Mama, I got to ding a ding dang
	my dang a long ling long" (Jesus Built My Hotrod -- Ministry)
GCS d* -p+ c++ l++ m--- s+/- !g w- t- r

 
From bob@amscons.amscons.com  Ukn Jul  2 14:26:48 1993
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From: bob@amscons.amscons.com (Bob Amstadt)
Subject: Re: SCSI chips, specifically NCR53c{,f}9x family
To: riscy@pyramid.com
Date: Fri, 2 Jul 1993 11:09:32 -0800 (PDT)
In-Reply-To: <199307021736.AA00596@nagina.cs.Colorado.EDU> from "Drew Eckhardt" at Jul 2, 93 11:36:24 am
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> Ok, I called NCR's SCSI division, got some literature on the 53c90 
> series, saw that the 53c90 looks like what we wanted, and talked to
> the local NCR distributor, Electrodyne (303)-695-903 for pricing
> information.

Two years ago, I used the 53C94 on a 68k-based controller board.
I never really pushed it to the limit, but it is a good part.
It does however require an external DMA controller (or processor 
intervention).

> The host/DMA interface is 8 bits wide, so it's best on an 
> 8 bit bus of the 3730.

It actually has 4 different modes:

    1. Single 8-bit bus
    2. Single bus, 8-bit to host, 16-bit to DMA
    3. 8-bit host bus (multiplexed address and data), separate 16-bit DMA bus
       with byte control.
    4. 8-bit host bus (separate address and data), separate 16-bit DMA bus
       without byte control.
-- 
Bob Amstadt
bob@amscons.com

 
