Get CPU features

Name

ggGetSwarType : Get CPU features

Synopsis

#include <ggi/gg.h>

enum gg_swartype ggGetSwarType(void);

Description

ggGetSwarType tells which specific instruction sets the CPU handle. This is useful to choose at runtime a specific implementation of a very time-consuming routine.

Return value

ggGetSwarType returns an integer in which each bit set means that a specific SWAR is available.

Recognized SWARs

The following flags are defined for all architectures. All of these flags can be OR'ed and are exclusive even between architecture. Note at this stage of development some of these SIMD sets are not yet detected correctly.

GG_SWAR_NONE

The CPU can run a vanilla C program. (hopefully!)

GG_SWAR_32BITC

The CPU can perform 32-bit math fast enough to give an advantage over 16-bit math for software SWAR implementations.

GG_SWAR_ALTIVEC

The CPU has an AltiVec matrix coprocessor (Motorolla G4.)

GG_SWAR_SSE

The CPU supports Intel Streaming SIMD Extensions.

GG_SWAR_SSE2

The CPU supports Intel Streaming SIMD Extensions Version 2.

GG_SWAR_MMX

The CPU supports Intel Multimedia Extensions.

GG_SWAR_MMXPLUS

The CPU supports Cyrix enhancements to Intel Multimedia Extensions.

GG_SWAR_3DNOW

The CPU supports AMD 3DNOW! instructions (and thus, also MMX.)

GG_SWAR_ADV3DNOW

The CPU supports AMD Advanced 3DNOW! instructions (and thus, also MMX.)

GG_SWAR_MAX

The CPU supports PA-RISC MAX Instructions.

GG_SWAR_SIGD

The CPU supports Microunity Mediaprocessor SIGD instructions.

Additionnaly, 64 bits architectures defines the following flags:

GG_SWAR_64BITC

The CPU can perform 64-bit math fast enough to give an advantage over 32-bit and 16-bit math for software SWAR implementations.

GG_SWAR_MVI

The CPU supports DEC (Compaq) Alpha Motion Video Instructions.

GG_SWAR_MAX2

The CPU supports PA-RISC MAX2 Instructions.

GG_SWAR_MDMX

The CPU supports MIPS Digital Media Extension (MaDMaX) Instructions.

GG_SWAR_MAJC

The CPU supports SUN Microprocessor Architecture for Java Computing.

GG_SWAR_VIS

The CPU supports the SUN Visual Instruction Set